Bodzio
Guest
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 Posted:
Wed Apr 06, 2005 1:24 pm Post subject:
adsl model under Matlab - problem with interleaving |
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hello again!
I posted it on matlab group too, but nobody answered :( so maybe here
anybody happen to be a matlab expert.
http://glinki.com/?l=xq7yi7
under the address You can find the matlab adsl_sim demo, which i
reconstructed in order to get the possibility to introduce the burst of
errors (as the vector in constant block in transmitter, e.g.
[zeros(1,120) ones(1,20) zeros(1,700)]'
this works allright when I plot it (scope). however, the convolutional
interleaving doesn't protect against this bursts of errors. the BER is
always worse, than it is for the non-interleaved path.
the first frame seems to be allright, but not a single one more. perhaps
it's a timing problem??? if so, how can I inverse the latency put by the
XOR - gate???
I will appreciate any help!
Best regards,
Bogdan |
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dyslexic
Guest
|
| Posted:
Thu Sep 01, 2005 6:50 am Post subject:
Re: adsl model under Matlab - problem with interleaving |
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hi, i m looking for an adsl or vdsl model on matlab, i ve to submit this
next week, would really appreciate if you have a model that i can use and
also if you have a report on explaining results, will be ery grateful,
this will do for my MSc other wise i ll have to re do it next year......
-------------------------------------
Bodzio wrote:
| Quote: | hello again!
I posted it on matlab group too, but nobody answered :( so maybe here
anybody happen to be a matlab expert.
http://glinki.com/?l=xq7yi7
under the address You can find the matlab adsl_sim demo, which i
reconstructed in order to get the possibility to introduce the burst of
errors (as the vector in constant block in transmitter, e.g.
[zeros(1,120) ones(1,20) zeros(1,700)]'
this works allright when I plot it (scope). however, the convolutional
interleaving doesn't protect against this bursts of errors. the BER is
always worse, than it is for the non-interleaved path.
the first frame seems to be allright, but not a single one more.
perhaps
it's a timing problem??? if so, how can I inverse the latency put by
the
XOR - gate???
I will appreciate any help!
Best regards,
Bogdan
|
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